PhD - modeling, architecture exploration and verification of Automotive SoCs (f/m/div.)

Robert Bosch GmbH

72770 Reutlingen - Deutschland

ADAS/AD Engineer Arbeit Vollzeit ab 01.12.2025

Beschreibung

Willkommen bei Bosch
Bei Bosch gestalten wir Zukunft mit hochwertigen Technologien und Dienstleistungen, die Begeisterung wecken und das Leben der Menschen verbessern. Unser Versprechen an unsere Mitarbeiterinnen und Mitarbeiter steht dabei felsenfest: Wir wachsen gemeinsam, haben Freude an unserer Arbeit und inspirieren uns gegenseitig. Willkommen bei Bosch.
Die Robert Bosch GmbH freut sich auf eine Bewerbung!

Job Description
Rapid and efficient architecture exploration facilitates making crucial design decisions during early phases of modern System-on-Chip (SoC) development. Furthermore, verifying automotive SoC using real-field scenarios is still needed to ensure quality and reliability. The goal of this study is to improve automotive SoC dimensioning as well as its overall quality, while reducing development effort and time. This topic addresses a modeling, exploration, and verification framework that focusses on modeling SW application as well as SoC architecture at different levels abstraction to boost the efficiency of architecture exploration. It also addresses design verification and bridging the gaps between SW development, SoC design and verification.
For this task you will receive support from our modeling and verification experts to gain in-depth understanding of our SoCs.
The employment as a scientific researcher at Bosch is offered for a duration of 3 years. We expect you to place your papers in high-ranking IEEE conferences.

Qualifications
- Education: excellent Master´s degree in Electrical Engineering, Computer Engineering, Computer Science or Electrical Engineering
- Experience and Knowledge: You have strong expertise in processor architectures, digital design, and verification, as well as excellent object-oriented programming skills in C++. Knowledge of additional programming languages is a plus. Ideally, you have experience in developing verification testbenches using SystemVerilog and are familiar with the Unified Verification Methodology (UVM). Experience with Matlab/Simulink is also considered beneficial.
- Personality and Working Practice: You bring a strong sense of curiosity and a continuous willingness to learn. Your working style is structured and analytical, with a focus on thoroughly documenting your concepts and results. Additionally, you take ownership of complex challenges, systematically analyzing and solving them. Strong English communication skills, both written and verbal, complete your profile.
- Languages: good English communication skills (written and verbal)

Additional Information
The final PhD topic is subject to your university.
Start: according to prior agreement
Diversity and inclusion are not just trends for us but are firmly anchored in our corporate culture. Therefore, we welcome all applications, regardless of gender, age, disability, religion, ethnic origin or sexual identity.

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